FIG. 19 is a cross-sectional view illustrating a main portion of a power semiconductor device. Here, a power semiconductor device 1000 is given as an example of a power semiconductor device including a plurality of semiconductor chips (for example, 20 chips). However, in FIG. 19, only one semiconductor chip is illustrated as a representative.
The power semiconductor device 1000 includes an insulating substrate 64, a semiconductor chip 66, a base plate 70, and a case 68.
The insulating substrate 64 is formed by laminating an insulating plate 61, a circuit plate 62, and a metal plate 63. The semiconductor chip 66 is fixed to the circuit plate 62 through a bonding material 65 such as solder. In addition, the semiconductor chip 66 is a power semiconductor chip such as an insulated gate bipolar transistor (IGBT) chip or a diode chip.
An external terminal 69 of the case 68 is connected to the semiconductor chip 66 by a bonding wire 67. The rear surface of the insulating substrate 64 is fixed to the base plate 70 by a bonding material 65. The case 68 is filled with a sealing resin 71, such as gel, and an opening portion of the case 68 is covered with an upper cover 72.
In recent years, a technique has been developed in which an integrated circuit (IC) chip is accommodated in a ceramic case having a cavity to reduce the size of an integrated circuit device. The integrated circuit device includes a ceramic case which has a terminal provided therein and a cavity and an IC chip which is accommodated in the cavity, and is called a cavity package. Since a small amount of current flows to the IC chip, the thickness of the terminal buried in the cavity package is generally in the range of about 10 μm to 20 μm.
Patent Document 1 discloses a structure in which a power semiconductor chip is provided in a step portion of an uneven circuit board and a circuit element is provided on a surface opposite to the step portion.